Update bling mx fill zones
This commit is contained in:
Duccio
parent
da044a9614
commit
3a15cb1614
139 changed files with 469817 additions and 469708 deletions
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@ -1,6 +1,6 @@
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# Sweep Compact LOW
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| Front | Back |
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This is the only Sweep version that supports the "Choc Mini" switch.
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# Sweep Compact LOW
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| Front | Back |
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| :---: | :---: |
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|  |  |
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This is the only Sweep version that supports the "Choc Mini" switch.
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@ -1,188 +1,188 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Connector_Generic_Conn_01x04
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#
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DEF Connector_Generic_Conn_01x04 J 0 40 Y N 1 F N
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F0 "J" 0 200 50 H V C CNN
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F1 "Connector_Generic_Conn_01x04" 0 -300 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S -50 -195 0 -205 1 1 6 N
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S -50 -95 0 -105 1 1 6 N
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S -50 5 0 -5 1 1 6 N
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S -50 105 0 95 1 1 6 N
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S -50 150 50 -250 1 1 10 f
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X Pin_1 1 -200 100 150 R 50 50 1 1 P
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X Pin_2 2 -200 0 150 R 50 50 1 1 P
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X Pin_3 3 -200 -100 150 R 50 50 1 1 P
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X Pin_4 4 -200 -200 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_D
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#
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DEF Device_D D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_D" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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TO-???*
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*_Diode_*
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*SingleDiode*
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D_*
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$ENDFPLIST
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DRAW
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P 2 0 1 8 -50 50 -50 -50 N
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P 2 0 1 0 50 0 -50 0 N
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P 4 0 1 8 50 50 50 -50 -50 0 50 50 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# corne-light-rescue_MJ-4PP-9-kbd
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#
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DEF corne-light-rescue_MJ-4PP-9-kbd J 0 40 Y Y 1 F N
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F0 "J" 0 150 50 H V C CNN
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F1 "corne-light-rescue_MJ-4PP-9-kbd" 0 -150 50 H V C CNN
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F2 "" 275 175 50 H I C CNN
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F3 "" 275 175 50 H I C CNN
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DRAW
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S -75 -75 -125 50 0 1 0 N
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S 125 100 -150 -100 0 1 12 N
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P 3 0 1 0 -100 50 -100 75 125 75 N
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P 4 0 1 0 -50 -75 -25 -50 0 -75 125 -75 N
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P 4 0 1 0 0 -25 25 0 50 -25 125 -25 N
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P 4 0 1 0 50 25 75 50 100 25 125 25 N
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X ~ A 200 75 79 L 28 20 1 1 I
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X ~ B 200 -75 79 L 28 20 1 1 I
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X ~ C 200 -25 79 L 28 20 1 1 I
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X ~ D 200 25 79 L 28 20 1 1 I
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ENDDRAW
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ENDDEF
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#
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# corne-light-rescue_ProMicro-kbd
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#
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DEF corne-light-rescue_ProMicro-kbd U 0 40 Y Y 1 F N
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F0 "U" 0 950 60 H V C CNN
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F1 "corne-light-rescue_ProMicro-kbd" 0 -550 60 H V C CNN
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F2 "" 100 -1050 60 H V C CNN
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F3 "" 100 -1050 60 H V C CNN
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DRAW
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S -500 850 500 -450 0 1 0 N
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X TX 1 -700 750 200 R 50 50 1 1 B
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X E6 10 -700 -150 200 R 50 50 1 1 B
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X B4 11 -700 -250 200 R 50 50 1 1 B
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X B5 12 -700 -350 200 R 50 50 1 1 B
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X B6 13 700 -350 200 L 50 50 1 1 B
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X B2 14 700 -250 200 L 50 50 1 1 B
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X B3 15 700 -150 200 L 50 50 1 1 B
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X B1 16 700 -50 200 L 50 50 1 1 B
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X F7 17 700 50 200 L 50 50 1 1 B
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X F6 18 700 150 200 L 50 50 1 1 B
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X F5 19 700 250 200 L 50 50 1 1 B
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X RX 2 -700 650 200 R 50 50 1 1 B
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X F4 20 700 350 200 L 50 50 1 1 B
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X VCC 21 700 450 200 L 50 50 1 1 W
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X RST 22 700 550 200 L 50 50 1 1 I
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X GND 23 700 650 200 L 50 50 1 1 W
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X RAW 24 700 750 200 L 50 50 1 1 w
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X GND 3 -700 550 200 R 50 50 1 1 W
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X GND 4 -700 450 200 R 50 50 1 1 W
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X SDA 5 -700 350 200 R 50 50 1 1 B
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X SCL 6 -700 250 200 R 50 50 1 1 B
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X D4 7 -700 150 200 R 50 50 1 1 B
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X C6 8 -700 50 200 R 50 50 1 1 B
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X D7 9 -700 -50 200 R 50 50 1 1 B
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ENDDRAW
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ENDDEF
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#
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# corne-light-rescue_SW_PUSH-kbd
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#
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DEF corne-light-rescue_SW_PUSH-kbd SW 0 40 N N 1 F N
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F0 "SW" 150 110 50 H V C CNN
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F1 "corne-light-rescue_SW_PUSH-kbd" 0 -80 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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S -170 50 170 60 0 1 0 N
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P 4 0 1 0 -40 60 -30 90 30 90 40 60 N
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X 1 1 -300 0 200 R 50 50 0 1 P I
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X 2 2 300 0 200 L 50 50 0 1 P I
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ENDDRAW
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ENDDEF
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#
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# power_GND
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#
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DEF power_GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "power_GND" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GND 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_GNDA
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#
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DEF power_GNDA #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "power_GNDA" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GNDA 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_PWR_FLAG
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#
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DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
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F0 "#FLG" 0 75 50 H I C CNN
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F1 "power_PWR_FLAG" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
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X pwr 1 0 0 0 U 50 50 0 0 w
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ENDDRAW
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ENDDEF
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#
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# power_VCC
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#
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DEF power_VCC #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_VCC" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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C 0 75 25 0 1 0 N
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P 2 0 1 0 0 0 0 50 N
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X VCC 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_VDD
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#
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DEF power_VDD #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_VDD" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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C 0 75 25 0 1 0 N
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P 2 0 1 0 0 0 0 50 N
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X VDD 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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#End Library
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Connector_Generic_Conn_01x04
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#
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DEF Connector_Generic_Conn_01x04 J 0 40 Y N 1 F N
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F0 "J" 0 200 50 H V C CNN
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F1 "Connector_Generic_Conn_01x04" 0 -300 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S -50 -195 0 -205 1 1 6 N
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S -50 -95 0 -105 1 1 6 N
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S -50 5 0 -5 1 1 6 N
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S -50 105 0 95 1 1 6 N
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S -50 150 50 -250 1 1 10 f
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X Pin_1 1 -200 100 150 R 50 50 1 1 P
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X Pin_2 2 -200 0 150 R 50 50 1 1 P
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X Pin_3 3 -200 -100 150 R 50 50 1 1 P
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X Pin_4 4 -200 -200 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_D
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#
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DEF Device_D D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_D" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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TO-???*
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*_Diode_*
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*SingleDiode*
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D_*
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$ENDFPLIST
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DRAW
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P 2 0 1 8 -50 50 -50 -50 N
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P 2 0 1 0 50 0 -50 0 N
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P 4 0 1 8 50 50 50 -50 -50 0 50 50 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# corne-light-rescue_MJ-4PP-9-kbd
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#
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DEF corne-light-rescue_MJ-4PP-9-kbd J 0 40 Y Y 1 F N
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F0 "J" 0 150 50 H V C CNN
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F1 "corne-light-rescue_MJ-4PP-9-kbd" 0 -150 50 H V C CNN
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F2 "" 275 175 50 H I C CNN
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F3 "" 275 175 50 H I C CNN
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DRAW
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S -75 -75 -125 50 0 1 0 N
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S 125 100 -150 -100 0 1 12 N
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P 3 0 1 0 -100 50 -100 75 125 75 N
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P 4 0 1 0 -50 -75 -25 -50 0 -75 125 -75 N
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P 4 0 1 0 0 -25 25 0 50 -25 125 -25 N
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P 4 0 1 0 50 25 75 50 100 25 125 25 N
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X ~ A 200 75 79 L 28 20 1 1 I
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X ~ B 200 -75 79 L 28 20 1 1 I
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X ~ C 200 -25 79 L 28 20 1 1 I
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X ~ D 200 25 79 L 28 20 1 1 I
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ENDDRAW
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ENDDEF
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#
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# corne-light-rescue_ProMicro-kbd
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#
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DEF corne-light-rescue_ProMicro-kbd U 0 40 Y Y 1 F N
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F0 "U" 0 950 60 H V C CNN
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F1 "corne-light-rescue_ProMicro-kbd" 0 -550 60 H V C CNN
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F2 "" 100 -1050 60 H V C CNN
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F3 "" 100 -1050 60 H V C CNN
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DRAW
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S -500 850 500 -450 0 1 0 N
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X TX 1 -700 750 200 R 50 50 1 1 B
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X E6 10 -700 -150 200 R 50 50 1 1 B
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X B4 11 -700 -250 200 R 50 50 1 1 B
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X B5 12 -700 -350 200 R 50 50 1 1 B
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X B6 13 700 -350 200 L 50 50 1 1 B
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X B2 14 700 -250 200 L 50 50 1 1 B
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X B3 15 700 -150 200 L 50 50 1 1 B
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X B1 16 700 -50 200 L 50 50 1 1 B
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X F7 17 700 50 200 L 50 50 1 1 B
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X F6 18 700 150 200 L 50 50 1 1 B
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X F5 19 700 250 200 L 50 50 1 1 B
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X RX 2 -700 650 200 R 50 50 1 1 B
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X F4 20 700 350 200 L 50 50 1 1 B
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X VCC 21 700 450 200 L 50 50 1 1 W
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X RST 22 700 550 200 L 50 50 1 1 I
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X GND 23 700 650 200 L 50 50 1 1 W
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X RAW 24 700 750 200 L 50 50 1 1 w
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X GND 3 -700 550 200 R 50 50 1 1 W
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X GND 4 -700 450 200 R 50 50 1 1 W
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X SDA 5 -700 350 200 R 50 50 1 1 B
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X SCL 6 -700 250 200 R 50 50 1 1 B
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X D4 7 -700 150 200 R 50 50 1 1 B
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X C6 8 -700 50 200 R 50 50 1 1 B
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X D7 9 -700 -50 200 R 50 50 1 1 B
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ENDDRAW
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ENDDEF
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#
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# corne-light-rescue_SW_PUSH-kbd
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#
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DEF corne-light-rescue_SW_PUSH-kbd SW 0 40 N N 1 F N
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F0 "SW" 150 110 50 H V C CNN
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F1 "corne-light-rescue_SW_PUSH-kbd" 0 -80 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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S -170 50 170 60 0 1 0 N
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P 4 0 1 0 -40 60 -30 90 30 90 40 60 N
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X 1 1 -300 0 200 R 50 50 0 1 P I
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X 2 2 300 0 200 L 50 50 0 1 P I
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ENDDRAW
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ENDDEF
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#
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# power_GND
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#
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DEF power_GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "power_GND" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GND 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_GNDA
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#
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DEF power_GNDA #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "power_GNDA" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GNDA 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_PWR_FLAG
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#
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DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
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F0 "#FLG" 0 75 50 H I C CNN
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F1 "power_PWR_FLAG" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
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X pwr 1 0 0 0 U 50 50 0 0 w
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ENDDRAW
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ENDDEF
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#
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# power_VCC
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#
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DEF power_VCC #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_VCC" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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C 0 75 25 0 1 0 N
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P 2 0 1 0 0 0 0 50 N
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X VCC 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_VDD
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#
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DEF power_VDD #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_VDD" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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C 0 75 25 0 1 0 N
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P 2 0 1 0 0 0 0 50 N
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X VDD 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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#End Library
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EESchema-DOCLIB Version 2.0
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#
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#End Doc Library
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EESchema-DOCLIB Version 2.0
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#
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#End Doc Library
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@ -1,76 +1,76 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# MJ-4PP-9-kbd-corne-light-rescue
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#
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DEF MJ-4PP-9-kbd-corne-light-rescue J 0 40 Y Y 1 F N
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F0 "J" 0 150 50 H V C CNN
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F1 "MJ-4PP-9-kbd-corne-light-rescue" 0 -150 50 H V C CNN
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F2 "" 275 175 50 H I C CNN
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F3 "" 275 175 50 H I C CNN
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DRAW
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S -75 -75 -125 50 0 1 0 N
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S 125 100 -150 -100 0 1 12 N
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P 3 0 1 0 -100 50 -100 75 125 75 N
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P 4 0 1 0 -50 -75 -25 -50 0 -75 125 -75 N
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P 4 0 1 0 0 -25 25 0 50 -25 125 -25 N
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P 4 0 1 0 50 25 75 50 100 25 125 25 N
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X ~ A 200 75 79 L 28 20 1 1 I
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X ~ B 200 -75 79 L 28 20 1 1 I
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X ~ C 200 -25 79 L 28 20 1 1 I
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X ~ D 200 25 79 L 28 20 1 1 I
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ENDDRAW
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ENDDEF
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#
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# ProMicro-kbd-corne-light-rescue
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#
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DEF ProMicro-kbd-corne-light-rescue U 0 40 Y Y 1 F N
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F0 "U" 0 950 60 H V C CNN
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F1 "ProMicro-kbd-corne-light-rescue" 0 -550 60 H V C CNN
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F2 "" 100 -1050 60 H V C CNN
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F3 "" 100 -1050 60 H V C CNN
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DRAW
|
||||
S -500 850 500 -450 0 1 0 N
|
||||
X TX 1 -700 750 200 R 50 50 1 1 B
|
||||
X E6 10 -700 -150 200 R 50 50 1 1 B
|
||||
X B4 11 -700 -250 200 R 50 50 1 1 B
|
||||
X B5 12 -700 -350 200 R 50 50 1 1 B
|
||||
X B6 13 700 -350 200 L 50 50 1 1 B
|
||||
X B2 14 700 -250 200 L 50 50 1 1 B
|
||||
X B3 15 700 -150 200 L 50 50 1 1 B
|
||||
X B1 16 700 -50 200 L 50 50 1 1 B
|
||||
X F7 17 700 50 200 L 50 50 1 1 B
|
||||
X F6 18 700 150 200 L 50 50 1 1 B
|
||||
X F5 19 700 250 200 L 50 50 1 1 B
|
||||
X RX 2 -700 650 200 R 50 50 1 1 B
|
||||
X F4 20 700 350 200 L 50 50 1 1 B
|
||||
X VCC 21 700 450 200 L 50 50 1 1 W
|
||||
X RST 22 700 550 200 L 50 50 1 1 I
|
||||
X GND 23 700 650 200 L 50 50 1 1 W
|
||||
X RAW 24 700 750 200 L 50 50 1 1 w
|
||||
X GND 3 -700 550 200 R 50 50 1 1 W
|
||||
X GND 4 -700 450 200 R 50 50 1 1 W
|
||||
X SDA 5 -700 350 200 R 50 50 1 1 B
|
||||
X SCL 6 -700 250 200 R 50 50 1 1 B
|
||||
X D4 7 -700 150 200 R 50 50 1 1 B
|
||||
X C6 8 -700 50 200 R 50 50 1 1 B
|
||||
X D7 9 -700 -50 200 R 50 50 1 1 B
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# SW_PUSH-kbd-corne-light-rescue
|
||||
#
|
||||
DEF SW_PUSH-kbd-corne-light-rescue SW 0 40 N N 1 F N
|
||||
F0 "SW" 150 110 50 H V C CNN
|
||||
F1 "SW_PUSH-kbd-corne-light-rescue" 0 -80 50 H V C CNN
|
||||
F2 "" 0 0 50 H V C CNN
|
||||
F3 "" 0 0 50 H V C CNN
|
||||
DRAW
|
||||
S -170 50 170 60 0 1 0 N
|
||||
P 4 0 1 0 -40 60 -30 90 30 90 40 60 N
|
||||
X 1 1 -300 0 200 R 50 50 0 1 P I
|
||||
X 2 2 300 0 200 L 50 50 0 1 P I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# MJ-4PP-9-kbd-corne-light-rescue
|
||||
#
|
||||
DEF MJ-4PP-9-kbd-corne-light-rescue J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "MJ-4PP-9-kbd-corne-light-rescue" 0 -150 50 H V C CNN
|
||||
F2 "" 275 175 50 H I C CNN
|
||||
F3 "" 275 175 50 H I C CNN
|
||||
DRAW
|
||||
S -75 -75 -125 50 0 1 0 N
|
||||
S 125 100 -150 -100 0 1 12 N
|
||||
P 3 0 1 0 -100 50 -100 75 125 75 N
|
||||
P 4 0 1 0 -50 -75 -25 -50 0 -75 125 -75 N
|
||||
P 4 0 1 0 0 -25 25 0 50 -25 125 -25 N
|
||||
P 4 0 1 0 50 25 75 50 100 25 125 25 N
|
||||
X ~ A 200 75 79 L 28 20 1 1 I
|
||||
X ~ B 200 -75 79 L 28 20 1 1 I
|
||||
X ~ C 200 -25 79 L 28 20 1 1 I
|
||||
X ~ D 200 25 79 L 28 20 1 1 I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# ProMicro-kbd-corne-light-rescue
|
||||
#
|
||||
DEF ProMicro-kbd-corne-light-rescue U 0 40 Y Y 1 F N
|
||||
F0 "U" 0 950 60 H V C CNN
|
||||
F1 "ProMicro-kbd-corne-light-rescue" 0 -550 60 H V C CNN
|
||||
F2 "" 100 -1050 60 H V C CNN
|
||||
F3 "" 100 -1050 60 H V C CNN
|
||||
DRAW
|
||||
S -500 850 500 -450 0 1 0 N
|
||||
X TX 1 -700 750 200 R 50 50 1 1 B
|
||||
X E6 10 -700 -150 200 R 50 50 1 1 B
|
||||
X B4 11 -700 -250 200 R 50 50 1 1 B
|
||||
X B5 12 -700 -350 200 R 50 50 1 1 B
|
||||
X B6 13 700 -350 200 L 50 50 1 1 B
|
||||
X B2 14 700 -250 200 L 50 50 1 1 B
|
||||
X B3 15 700 -150 200 L 50 50 1 1 B
|
||||
X B1 16 700 -50 200 L 50 50 1 1 B
|
||||
X F7 17 700 50 200 L 50 50 1 1 B
|
||||
X F6 18 700 150 200 L 50 50 1 1 B
|
||||
X F5 19 700 250 200 L 50 50 1 1 B
|
||||
X RX 2 -700 650 200 R 50 50 1 1 B
|
||||
X F4 20 700 350 200 L 50 50 1 1 B
|
||||
X VCC 21 700 450 200 L 50 50 1 1 W
|
||||
X RST 22 700 550 200 L 50 50 1 1 I
|
||||
X GND 23 700 650 200 L 50 50 1 1 W
|
||||
X RAW 24 700 750 200 L 50 50 1 1 w
|
||||
X GND 3 -700 550 200 R 50 50 1 1 W
|
||||
X GND 4 -700 450 200 R 50 50 1 1 W
|
||||
X SDA 5 -700 350 200 R 50 50 1 1 B
|
||||
X SCL 6 -700 250 200 R 50 50 1 1 B
|
||||
X D4 7 -700 150 200 R 50 50 1 1 B
|
||||
X C6 8 -700 50 200 R 50 50 1 1 B
|
||||
X D7 9 -700 -50 200 R 50 50 1 1 B
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# SW_PUSH-kbd-corne-light-rescue
|
||||
#
|
||||
DEF SW_PUSH-kbd-corne-light-rescue SW 0 40 N N 1 F N
|
||||
F0 "SW" 150 110 50 H V C CNN
|
||||
F1 "SW_PUSH-kbd-corne-light-rescue" 0 -80 50 H V C CNN
|
||||
F2 "" 0 0 50 H V C CNN
|
||||
F3 "" 0 0 50 H V C CNN
|
||||
DRAW
|
||||
S -170 50 170 60 0 1 0 N
|
||||
P 4 0 1 0 -40 60 -30 90 30 90 40 60 N
|
||||
X 1 1 -300 0 200 R 50 50 0 1 P I
|
||||
X 2 2 300 0 200 L 50 50 0 1 P I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
|
|
|
|||
|
|
@ -1,386 +1,386 @@
|
|||
(pcb "/home/david/Projects/36keys/34Keys/Ferris Sweep Compact LOW/ferris-sweep-compact.dsn"
|
||||
(parser
|
||||
(string_quote ")
|
||||
(space_in_quoted_tokens on)
|
||||
(host_cad "KiCad's Pcbnew")
|
||||
(host_version "5.1.8")
|
||||
)
|
||||
(resolution um 10)
|
||||
(unit um)
|
||||
(structure
|
||||
(layer F.Cu
|
||||
(type signal)
|
||||
(property
|
||||
(index 0)
|
||||
)
|
||||
)
|
||||
(layer B.Cu
|
||||
(type signal)
|
||||
(property
|
||||
(index 1)
|
||||
)
|
||||
)
|
||||
(boundary
|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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||||
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|
||||
86369.8 -15152.7 88766.5 -15372.4)
|
||||
)
|
||||
(via "Via[0-1]_600:400_um")
|
||||
(rule
|
||||
(width 250)
|
||||
(clearance 200.1)
|
||||
(clearance 200.1 (type default_smd))
|
||||
(clearance 50 (type smd_smd))
|
||||
)
|
||||
)
|
||||
(placement
|
||||
(component Kailh:Kailh_PG1232
|
||||
(place SW10 80000 -42670 front 0 (PN SW_PUSH))
|
||||
(place SW2 44000 -42370 front 0 (PN SW_PUSH))
|
||||
(place SW3 62000 -30140 front 0 (PN SW_PUSH))
|
||||
(place SW5 98000 -30540 front 0 (PN SW_PUSH))
|
||||
(place SW6 116000 -32420 front 0 (PN SW_PUSH))
|
||||
(place SW8 44000 -59370 front 0 (PN SW_PUSH))
|
||||
(place SW9 62000 -47140 front 0 (PN SW_PUSH))
|
||||
(place SW11 98000 -47540 front 0 (PN SW_PUSH))
|
||||
(place SW12 116000 -49420 front 0 (PN SW_PUSH))
|
||||
(place SW15 62000 -64145 front 0 (PN SW_PUSH))
|
||||
(place SW16 80000 -59670 front 0 (PN SW_PUSH))
|
||||
(place SW17 98000 -64545 front 0 (PN SW_PUSH))
|
||||
(place SW18 116000 -66420 front 0 (PN SW_PUSH))
|
||||
(place SW14 44000 -76375 front 0 (PN SW_PUSH))
|
||||
(place SW4 80000 -25680 front 0 (PN SW_PUSH))
|
||||
)
|
||||
(component kbd:ProMicro_v3
|
||||
(place U1 134300 -56500 front 0 (PN ProMicro))
|
||||
)
|
||||
(component Kailh:ferris_broom
|
||||
(place G*** 80300 -79150 back 351 (PN LOGO))
|
||||
)
|
||||
(component foostan:ResetSW
|
||||
(place RSW1 126970 -77240 front 90 (PN Val**))
|
||||
)
|
||||
(component "kbd:MJ-4PP-9"
|
||||
(place J1 142020 -78680 front 270 (PN "MJ-4PP-9"))
|
||||
)
|
||||
)
|
||||
(library
|
||||
(image Kailh:Kailh_PG1232
|
||||
(outline (path signal 120 -5950 2950 5950 2950))
|
||||
(outline (path signal 120 5950 2950 5950 -2950))
|
||||
(outline (path signal 120 -5950 -2950 -5950 2950))
|
||||
(outline (path signal 120 -6750 6250 6750 6250))
|
||||
(outline (path signal 120 6750 6250 6750 -6250))
|
||||
(outline (path signal 120 6750 -6250 -6750 -6250))
|
||||
(outline (path signal 120 -6750 -6250 -6750 6250))
|
||||
(outline (path signal 120 -2250 -2950 -2250 -4000))
|
||||
(outline (path signal 120 -2250 -4000 2250 -4000))
|
||||
(outline (path signal 120 2250 -4000 2250 -2950))
|
||||
(outline (path signal 120 -2250 -2950 -5950 -2950))
|
||||
(outline (path signal 120 2250 -2950 5950 -2950))
|
||||
(outline (path signal 120 -9000 8500 -9000 -8500))
|
||||
(outline (path signal 120 -9000 -8500 9000 -8500))
|
||||
(outline (path signal 120 9000 -8500 9000 8500))
|
||||
(outline (path signal 120 9000 8500 -9000 8500))
|
||||
(pin Oval[A]Pad_4700x1000_um @1 0 -3500)
|
||||
(pin Oval[A]Pad_1200x300_um (rotate 90) @2 -2200 -3500)
|
||||
(pin Oval[A]Pad_1200x300_um (rotate 90) @3 2200 -3500)
|
||||
(pin Oval[A]Pad_4700x300_um @4 0 -3950)
|
||||
(pin Oval[A]Pad_1000x5900_um @5 5360 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @6 4590 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @7 4200 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @8 -4200 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @9 -4590 0)
|
||||
(pin Oval[A]Pad_6100x300_um (rotate 90) @10 -5900 0)
|
||||
(pin Oval[A]Pad_6100x300_um (rotate 90) @11 5900 0)
|
||||
(pin Oval[A]Pad_12100x300_um @12 0 -2900)
|
||||
(pin Oval[A]Pad_12100x300_um @13 0 2900)
|
||||
(pin Oval[A]Pad_1000x5900_um @14 -5360 0)
|
||||
(pin Oval[A]Pad_11850x5900_um @15 0 0)
|
||||
(pin Round[A]Pad_1600_um 1 4580 -5100)
|
||||
(pin Round[A]Pad_1600_um 2 -2000 -5400)
|
||||
(pin Round[A]Pad_1600_um 1@1 -4580 -5100)
|
||||
(pin Round[A]Pad_1600_um 2@1 2000 -5400)
|
||||
(pin Round[A]Pad_1600_um 3 5300 4750)
|
||||
(pin Round[A]Pad_1600_um 4 -5300 4750)
|
||||
)
|
||||
(image kbd:ProMicro_v3
|
||||
(outline (path signal 150 8900 -14750 7890 -14750))
|
||||
(outline (path signal 150 -8900 -14750 -7900 -14750))
|
||||
(outline (path signal 150 8900 -13750 8900 -14750))
|
||||
(outline (path signal 150 -8900 -13700 -8900 -14750))
|
||||
(outline (path signal 150 8900 18300 7950 18300))
|
||||
(outline (path signal 150 -8900 18300 -7900 18300))
|
||||
(outline (path signal 150 8900 18300 8900 17300))
|
||||
(outline (path signal 150 -8900 18300 -8900 17300))
|
||||
(outline (path signal 150 -8900 -14750 -8900 18300))
|
||||
(outline (path signal 150 8900 -14750 -8900 -14750))
|
||||
(outline (path signal 150 8900 18300 8900 -14750))
|
||||
(outline (path signal 150 -8900 18300 -3750 18300))
|
||||
(outline (path signal 150 -3750 19600 3750 19600))
|
||||
(outline (path signal 150 3750 19600 3750 18300))
|
||||
(outline (path signal 150 -3750 19600 -3750 18299))
|
||||
(outline (path signal 150 -3750 18300 3750 18300))
|
||||
(outline (path signal 150 3760 18300 8900 18300))
|
||||
(outline (path signal 150 -3750 21200 -3750 19900))
|
||||
(outline (path signal 150 -3750 19900 3750 19900))
|
||||
(outline (path signal 150 3750 19900 3750 21200))
|
||||
(outline (path signal 150 3750 21200 -3750 21200))
|
||||
(outline (path signal 150 -500 20850 500 20850))
|
||||
(outline (path signal 150 500 20850 0 20200))
|
||||
(outline (path signal 150 0 20200 -500 20850))
|
||||
(outline (path signal 150 -350 20700 350 20700))
|
||||
(outline (path signal 150 -250 20550 250 20550))
|
||||
(outline (path signal 150 -150 20400 150 20400))
|
||||
(pin Round[A]Pad_1524_um 1 7611.4 14478)
|
||||
(pin Round[A]Pad_1524_um 2 7611.4 11938)
|
||||
(pin Round[A]Pad_1524_um 3 7611.4 9398)
|
||||
(pin Round[A]Pad_1524_um 4 7611.4 6858)
|
||||
(pin Round[A]Pad_1524_um 5 7611.4 4318)
|
||||
(pin Round[A]Pad_1524_um 6 7611.4 1778)
|
||||
(pin Round[A]Pad_1524_um 7 7611.4 -762)
|
||||
(pin Round[A]Pad_1524_um 8 7611.4 -3302)
|
||||
(pin Round[A]Pad_1524_um 9 7611.4 -5842)
|
||||
(pin Round[A]Pad_1524_um 10 7611.4 -8382)
|
||||
(pin Round[A]Pad_1524_um 11 7611.4 -10922)
|
||||
(pin Round[A]Pad_1524_um 12 7611.4 -13462)
|
||||
(pin Round[A]Pad_1524_um 13 -7608.6 -13462)
|
||||
(pin Round[A]Pad_1524_um 14 -7608.6 -10922)
|
||||
(pin Round[A]Pad_1524_um 15 -7608.6 -8382)
|
||||
(pin Round[A]Pad_1524_um 16 -7608.6 -5842)
|
||||
(pin Round[A]Pad_1524_um 17 -7608.6 -3302)
|
||||
(pin Round[A]Pad_1524_um 18 -7608.6 -762)
|
||||
(pin Round[A]Pad_1524_um 19 -7608.6 1778)
|
||||
(pin Round[A]Pad_1524_um 20 -7608.6 4318)
|
||||
(pin Round[A]Pad_1524_um 21 -7608.6 6858)
|
||||
(pin Round[A]Pad_1524_um 22 -7608.6 9398)
|
||||
(pin Round[A]Pad_1524_um 23 -7608.6 11938)
|
||||
(pin Round[A]Pad_1524_um 24 -7608.6 14478)
|
||||
)
|
||||
(image Kailh:ferris_broom
|
||||
)
|
||||
(image foostan:ResetSW
|
||||
(outline (path signal 150 3000 -1500 3000 -1750))
|
||||
(outline (path signal 150 3000 -1750 -3000 -1750))
|
||||
(outline (path signal 150 -3000 -1750 -3000 -1500))
|
||||
(outline (path signal 150 -3000 1500 -3000 1750))
|
||||
(outline (path signal 150 -3000 1750 3000 1750))
|
||||
(outline (path signal 150 3000 1750 3000 1500))
|
||||
(outline (path signal 150 -3000 -1750 3000 -1750))
|
||||
(outline (path signal 150 3000 -1750 3000 -1500))
|
||||
(outline (path signal 150 -3000 -1750 -3000 -1500))
|
||||
(outline (path signal 150 -3000 1750 -3000 1500))
|
||||
(outline (path signal 150 -3000 1750 3000 1750))
|
||||
(outline (path signal 150 3000 1750 3000 1500))
|
||||
(pin Round[A]Pad_2000_um 1 3250 0)
|
||||
(pin Round[A]Pad_2000_um 2 -3250 0)
|
||||
)
|
||||
(image "kbd:MJ-4PP-9"
|
||||
(outline (path signal 150 -4750 -12000 -4750 0))
|
||||
(outline (path signal 150 1250 -12000 -4750 -12000))
|
||||
(outline (path signal 150 1250 0 1250 -12000))
|
||||
(outline (path signal 150 -4750 0 1250 0))
|
||||
(outline (path signal 150 -3000 0 3000 0))
|
||||
(outline (path signal 150 3000 0 3000 -12000))
|
||||
(outline (path signal 150 3000 -12000 -3000 -12000))
|
||||
(outline (path signal 150 -3000 -12000 -3000 0))
|
||||
(pin Oval[A]Pad_1700x2500_um D -3850 -10300)
|
||||
(pin Oval[A]Pad_1700x2500_um A 350 -11800)
|
||||
(pin Oval[A]Pad_1700x2500_um B -3850 -3300)
|
||||
(pin Oval[A]Pad_1700x2500_um C -3850 -6300)
|
||||
(pin Oval[A]Pad_1700x2500_um B@1 2100 -3300)
|
||||
(pin Oval[A]Pad_1700x2500_um C@1 2100 -6300)
|
||||
(pin Oval[A]Pad_1700x2500_um D@1 2100 -10300)
|
||||
(pin Oval[A]Pad_1700x2500_um A@1 -2100 -11800)
|
||||
(keepout "" (circle F.Cu 1200 -1750 -8500))
|
||||
(keepout "" (circle B.Cu 1200 -1750 -8500))
|
||||
(keepout "" (circle F.Cu 1200 -1750 -1500))
|
||||
(keepout "" (circle B.Cu 1200 -1750 -1500))
|
||||
(keepout "" (circle F.Cu 1200 0 -1500))
|
||||
(keepout "" (circle B.Cu 1200 0 -1500))
|
||||
(keepout "" (circle F.Cu 1200 0 -8500))
|
||||
(keepout "" (circle B.Cu 1200 0 -8500))
|
||||
)
|
||||
(padstack Round[A]Pad_1524_um
|
||||
(shape (circle F.Cu 1524))
|
||||
(shape (circle B.Cu 1524))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Round[A]Pad_1600_um
|
||||
(shape (circle F.Cu 1600))
|
||||
(shape (circle B.Cu 1600))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Round[A]Pad_2000_um
|
||||
(shape (circle F.Cu 2000))
|
||||
(shape (circle B.Cu 2000))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_4700x1000_um
|
||||
(shape (path F.Cu 1000 -1850 0 1850 0))
|
||||
(shape (path B.Cu 1000 -1850 0 1850 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_1000x5900_um
|
||||
(shape (path F.Cu 1000 0 -2450 0 2450))
|
||||
(shape (path B.Cu 1000 0 -2450 0 2450))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_1700x2500_um
|
||||
(shape (path F.Cu 1700 0 -400 0 400))
|
||||
(shape (path B.Cu 1700 0 -400 0 400))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_4700x300_um
|
||||
(shape (path F.Cu 300 -2200 0 2200 0))
|
||||
(shape (path B.Cu 300 -2200 0 2200 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_6100x300_um
|
||||
(shape (path F.Cu 300 -2900 0 2900 0))
|
||||
(shape (path B.Cu 300 -2900 0 2900 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_1200x300_um
|
||||
(shape (path F.Cu 300 -450 0 450 0))
|
||||
(shape (path B.Cu 300 -450 0 450 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_12100x300_um
|
||||
(shape (path F.Cu 300 -5900 0 5900 0))
|
||||
(shape (path B.Cu 300 -5900 0 5900 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_11850x5900_um
|
||||
(shape (path F.Cu 5900 -2975 0 2975 0))
|
||||
(shape (path B.Cu 5900 -2975 0 2975 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack "Via[0-1]_600:400_um"
|
||||
(shape (circle F.Cu 600))
|
||||
(shape (circle B.Cu 600))
|
||||
(attach off)
|
||||
)
|
||||
)
|
||||
(network
|
||||
(net row0
|
||||
(pins SW16-1 SW16-1@1 U1-7)
|
||||
)
|
||||
(net row1
|
||||
(pins SW17-1 SW17-1@1 U1-8)
|
||||
)
|
||||
(net row2
|
||||
(pins SW18-1 SW18-1@1 U1-9)
|
||||
)
|
||||
(net row3
|
||||
(pins SW2-1 SW2-1@1 U1-10)
|
||||
)
|
||||
(net GND
|
||||
(pins SW10-2 SW10-2@1 SW2-2 SW2-2@1 SW3-2 SW3-2@1 SW5-2 SW5-2@1 SW6-2 SW6-2@1
|
||||
SW8-2 SW8-2@1 SW9-2 SW9-2@1 SW11-2 SW11-2@1 SW12-2 SW12-2@1 SW15-2 SW15-2@1
|
||||
SW16-2 SW16-2@1 SW17-2 SW17-2@1 SW18-2 SW18-2@1 SW14-2 SW14-2@1 SW4-2 SW4-2@1
|
||||
U1-3 U1-4 U1-23 RSW1-2 J1-C J1-C@1)
|
||||
)
|
||||
(net VCC
|
||||
(pins U1-21 J1-D J1-D@1)
|
||||
)
|
||||
(net col0
|
||||
(pins SW6-1 SW6-1@1 U1-20)
|
||||
)
|
||||
(net col1
|
||||
(pins SW5-1 SW5-1@1 U1-19)
|
||||
)
|
||||
(net col2
|
||||
(pins SW4-1 SW4-1@1 U1-18)
|
||||
)
|
||||
(net col3
|
||||
(pins SW3-1 SW3-1@1 U1-17)
|
||||
)
|
||||
(net col4
|
||||
(pins SW8-1 SW8-1@1 U1-16)
|
||||
)
|
||||
(net col5
|
||||
(pins SW9-1 SW9-1@1 U1-15)
|
||||
)
|
||||
(net LED
|
||||
(pins SW12-1 SW12-1@1 U1-1)
|
||||
)
|
||||
(net data
|
||||
(pins U1-2 J1-B J1-B@1)
|
||||
)
|
||||
(net reset
|
||||
(pins U1-22 RSW1-1)
|
||||
)
|
||||
(net SCL
|
||||
(pins SW15-1 SW15-1@1 U1-6)
|
||||
)
|
||||
(net SDA
|
||||
(pins SW14-1 SW14-1@1 U1-5)
|
||||
)
|
||||
(net "Net-(U1-Pad24)"
|
||||
(pins U1-24)
|
||||
)
|
||||
(net "Net-(J1-PadA)"
|
||||
(pins J1-A J1-A@1)
|
||||
)
|
||||
(net "Net-(U1-Pad14)"
|
||||
(pins SW10-1 SW10-1@1 U1-14)
|
||||
)
|
||||
(net "Net-(U1-Pad13)"
|
||||
(pins SW11-1 SW11-1@1 U1-13)
|
||||
)
|
||||
(net "Net-(U1-Pad12)"
|
||||
(pins U1-12)
|
||||
)
|
||||
(net "Net-(U1-Pad11)"
|
||||
(pins U1-11)
|
||||
)
|
||||
(class kicad_default "" GND LED "Net-(J1-PadA)" "Net-(U1-Pad11)" "Net-(U1-Pad12)"
|
||||
"Net-(U1-Pad13)" "Net-(U1-Pad14)" "Net-(U1-Pad24)" SCL SDA VCC col0
|
||||
col1 col2 col3 col4 col5 data reset row0 row1 row2 row3
|
||||
(circuit
|
||||
(use_via Via[0-1]_600:400_um)
|
||||
)
|
||||
(rule
|
||||
(width 250)
|
||||
(clearance 200.1)
|
||||
)
|
||||
)
|
||||
)
|
||||
(wiring
|
||||
)
|
||||
)
|
||||
(pcb "/home/david/Projects/36keys/34Keys/Ferris Sweep Compact LOW/ferris-sweep-compact.dsn"
|
||||
(parser
|
||||
(string_quote ")
|
||||
(space_in_quoted_tokens on)
|
||||
(host_cad "KiCad's Pcbnew")
|
||||
(host_version "5.1.8")
|
||||
)
|
||||
(resolution um 10)
|
||||
(unit um)
|
||||
(structure
|
||||
(layer F.Cu
|
||||
(type signal)
|
||||
(property
|
||||
(index 0)
|
||||
)
|
||||
)
|
||||
(layer B.Cu
|
||||
(type signal)
|
||||
(property
|
||||
(index 1)
|
||||
)
|
||||
)
|
||||
(boundary
|
||||
(path pcb 0 88766.5 -15372.4 91159.2 -15632.1 93547.2 -15931.7
|
||||
95929.9 -16271.2 98306.5 -16650.5 100677 -17069.4 103039 -17527.9
|
||||
105394 -18025.8 107740 -18562.9 110077 -19139.2 112403 -19754.5
|
||||
114720 -20408.5 117024 -21101.2 119318 -21832.3 121598 -22601.6
|
||||
123865 -23408.9 124011 -23497.5 124132 -23616.5 124224 -23760
|
||||
124281 -23920.3 124300 -24089.4 124300 -36080 124330 -36360.8
|
||||
124399 -36634.6 124506 -36896 124648 -37139.7 124824 -37360.9
|
||||
125028 -37555.3 125259 -37718.9 125509 -37848.4 125776 -37941.4
|
||||
126053 -37995.9 126335 -38010.9 142240 -38008 142407 -38026.8
|
||||
142565 -38082.3 142708 -38171.6 142826 -38290.4 142916 -38432.6
|
||||
142971 -38591.1 142990 -38758 143002 -75184 142974 -76027.3
|
||||
142904 -76868.1 142792 -77704.3 142638 -78533.8 142442 -79354.5
|
||||
142205 -80164.3 141928 -80961.2 141611 -81743.1 141255 -82508.1
|
||||
130748 -101101 130580 -101329 130381 -101530 130156 -101700
|
||||
129908 -101836 129644 -101936 129368 -101996 129086 -102017
|
||||
128804 -101996 128528 -101936 128264 -101836 128016 -101700
|
||||
126457 -100789 124879 -99910.3 123283 -99065.1 121669 -98253.4
|
||||
120039 -97475.7 118393 -96732.3 116732 -96023.5 115056 -95349.7
|
||||
113367 -94711 111665 -94107.9 109950 -93540.5 108224 -93009.1
|
||||
106487 -92513.9 102926 -91756 99356.4 -91038.1 95779.1 -90360.4
|
||||
92194.3 -89722.9 88602.7 -89125.7 85004.5 -88569 81400.3 -88052.7
|
||||
77790.5 -87577 74175.7 -87141.9 70556.1 -86747.4 66932.4 -86393.6
|
||||
63304.9 -86080.6 59674.1 -85808.4 56040.5 -85577 52404.5 -85386.4
|
||||
48766.6 -85236.7 45127.2 -85128 41486.9 -85060.1 37846 -85033.1
|
||||
37561.6 -85021.4 37281.8 -84969.5 37012.1 -84878.3 36758.1 -84749.9
|
||||
36524.9 -84586.7 36317.3 -84392.1 36139.3 -84170 35994.6 -83924.9
|
||||
35886.2 -83661.7 35816.2 -83385.8 35786 -83102.8 35768.1 -33928.7
|
||||
35915 -33537.6 36101.2 -33163.7 36324.9 -32810.9 36583.7 -32482.9
|
||||
36874.7 -32183.2 37195 -31915 38443.4 -30860.4 39716.5 -29835.9
|
||||
41013.6 -28841.8 42333.9 -27878.9 43676.8 -26947.7 45041.5 -26048.7
|
||||
46427.1 -25182.3 47833 -24349.2 49258.2 -23549.7 50702.1 -22784.3
|
||||
52163.7 -22053.4 53642.3 -21357.5 55137.1 -20697 56647.1 -20072.2
|
||||
58171.5 -19483.5 59709.5 -18931.1 61260.2 -18415.5 62822.8 -17936.9
|
||||
64396.2 -17495.6 65979.8 -17091.9 67572.4 -16725.9 69173.3 -16397.8
|
||||
70781.6 -16108 72396.3 -15856.4 74016.5 -15643.3 75641.4 -15468.8
|
||||
77269.9 -15332.9 78901.2 -15235.8 80534.3 -15177.6 82168.4 -15158.1
|
||||
86369.8 -15152.7 88766.5 -15372.4)
|
||||
)
|
||||
(via "Via[0-1]_600:400_um")
|
||||
(rule
|
||||
(width 250)
|
||||
(clearance 200.1)
|
||||
(clearance 200.1 (type default_smd))
|
||||
(clearance 50 (type smd_smd))
|
||||
)
|
||||
)
|
||||
(placement
|
||||
(component Kailh:Kailh_PG1232
|
||||
(place SW10 80000 -42670 front 0 (PN SW_PUSH))
|
||||
(place SW2 44000 -42370 front 0 (PN SW_PUSH))
|
||||
(place SW3 62000 -30140 front 0 (PN SW_PUSH))
|
||||
(place SW5 98000 -30540 front 0 (PN SW_PUSH))
|
||||
(place SW6 116000 -32420 front 0 (PN SW_PUSH))
|
||||
(place SW8 44000 -59370 front 0 (PN SW_PUSH))
|
||||
(place SW9 62000 -47140 front 0 (PN SW_PUSH))
|
||||
(place SW11 98000 -47540 front 0 (PN SW_PUSH))
|
||||
(place SW12 116000 -49420 front 0 (PN SW_PUSH))
|
||||
(place SW15 62000 -64145 front 0 (PN SW_PUSH))
|
||||
(place SW16 80000 -59670 front 0 (PN SW_PUSH))
|
||||
(place SW17 98000 -64545 front 0 (PN SW_PUSH))
|
||||
(place SW18 116000 -66420 front 0 (PN SW_PUSH))
|
||||
(place SW14 44000 -76375 front 0 (PN SW_PUSH))
|
||||
(place SW4 80000 -25680 front 0 (PN SW_PUSH))
|
||||
)
|
||||
(component kbd:ProMicro_v3
|
||||
(place U1 134300 -56500 front 0 (PN ProMicro))
|
||||
)
|
||||
(component Kailh:ferris_broom
|
||||
(place G*** 80300 -79150 back 351 (PN LOGO))
|
||||
)
|
||||
(component foostan:ResetSW
|
||||
(place RSW1 126970 -77240 front 90 (PN Val**))
|
||||
)
|
||||
(component "kbd:MJ-4PP-9"
|
||||
(place J1 142020 -78680 front 270 (PN "MJ-4PP-9"))
|
||||
)
|
||||
)
|
||||
(library
|
||||
(image Kailh:Kailh_PG1232
|
||||
(outline (path signal 120 -5950 2950 5950 2950))
|
||||
(outline (path signal 120 5950 2950 5950 -2950))
|
||||
(outline (path signal 120 -5950 -2950 -5950 2950))
|
||||
(outline (path signal 120 -6750 6250 6750 6250))
|
||||
(outline (path signal 120 6750 6250 6750 -6250))
|
||||
(outline (path signal 120 6750 -6250 -6750 -6250))
|
||||
(outline (path signal 120 -6750 -6250 -6750 6250))
|
||||
(outline (path signal 120 -2250 -2950 -2250 -4000))
|
||||
(outline (path signal 120 -2250 -4000 2250 -4000))
|
||||
(outline (path signal 120 2250 -4000 2250 -2950))
|
||||
(outline (path signal 120 -2250 -2950 -5950 -2950))
|
||||
(outline (path signal 120 2250 -2950 5950 -2950))
|
||||
(outline (path signal 120 -9000 8500 -9000 -8500))
|
||||
(outline (path signal 120 -9000 -8500 9000 -8500))
|
||||
(outline (path signal 120 9000 -8500 9000 8500))
|
||||
(outline (path signal 120 9000 8500 -9000 8500))
|
||||
(pin Oval[A]Pad_4700x1000_um @1 0 -3500)
|
||||
(pin Oval[A]Pad_1200x300_um (rotate 90) @2 -2200 -3500)
|
||||
(pin Oval[A]Pad_1200x300_um (rotate 90) @3 2200 -3500)
|
||||
(pin Oval[A]Pad_4700x300_um @4 0 -3950)
|
||||
(pin Oval[A]Pad_1000x5900_um @5 5360 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @6 4590 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @7 4200 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @8 -4200 0)
|
||||
(pin Oval[A]Pad_1000x5900_um @9 -4590 0)
|
||||
(pin Oval[A]Pad_6100x300_um (rotate 90) @10 -5900 0)
|
||||
(pin Oval[A]Pad_6100x300_um (rotate 90) @11 5900 0)
|
||||
(pin Oval[A]Pad_12100x300_um @12 0 -2900)
|
||||
(pin Oval[A]Pad_12100x300_um @13 0 2900)
|
||||
(pin Oval[A]Pad_1000x5900_um @14 -5360 0)
|
||||
(pin Oval[A]Pad_11850x5900_um @15 0 0)
|
||||
(pin Round[A]Pad_1600_um 1 4580 -5100)
|
||||
(pin Round[A]Pad_1600_um 2 -2000 -5400)
|
||||
(pin Round[A]Pad_1600_um 1@1 -4580 -5100)
|
||||
(pin Round[A]Pad_1600_um 2@1 2000 -5400)
|
||||
(pin Round[A]Pad_1600_um 3 5300 4750)
|
||||
(pin Round[A]Pad_1600_um 4 -5300 4750)
|
||||
)
|
||||
(image kbd:ProMicro_v3
|
||||
(outline (path signal 150 8900 -14750 7890 -14750))
|
||||
(outline (path signal 150 -8900 -14750 -7900 -14750))
|
||||
(outline (path signal 150 8900 -13750 8900 -14750))
|
||||
(outline (path signal 150 -8900 -13700 -8900 -14750))
|
||||
(outline (path signal 150 8900 18300 7950 18300))
|
||||
(outline (path signal 150 -8900 18300 -7900 18300))
|
||||
(outline (path signal 150 8900 18300 8900 17300))
|
||||
(outline (path signal 150 -8900 18300 -8900 17300))
|
||||
(outline (path signal 150 -8900 -14750 -8900 18300))
|
||||
(outline (path signal 150 8900 -14750 -8900 -14750))
|
||||
(outline (path signal 150 8900 18300 8900 -14750))
|
||||
(outline (path signal 150 -8900 18300 -3750 18300))
|
||||
(outline (path signal 150 -3750 19600 3750 19600))
|
||||
(outline (path signal 150 3750 19600 3750 18300))
|
||||
(outline (path signal 150 -3750 19600 -3750 18299))
|
||||
(outline (path signal 150 -3750 18300 3750 18300))
|
||||
(outline (path signal 150 3760 18300 8900 18300))
|
||||
(outline (path signal 150 -3750 21200 -3750 19900))
|
||||
(outline (path signal 150 -3750 19900 3750 19900))
|
||||
(outline (path signal 150 3750 19900 3750 21200))
|
||||
(outline (path signal 150 3750 21200 -3750 21200))
|
||||
(outline (path signal 150 -500 20850 500 20850))
|
||||
(outline (path signal 150 500 20850 0 20200))
|
||||
(outline (path signal 150 0 20200 -500 20850))
|
||||
(outline (path signal 150 -350 20700 350 20700))
|
||||
(outline (path signal 150 -250 20550 250 20550))
|
||||
(outline (path signal 150 -150 20400 150 20400))
|
||||
(pin Round[A]Pad_1524_um 1 7611.4 14478)
|
||||
(pin Round[A]Pad_1524_um 2 7611.4 11938)
|
||||
(pin Round[A]Pad_1524_um 3 7611.4 9398)
|
||||
(pin Round[A]Pad_1524_um 4 7611.4 6858)
|
||||
(pin Round[A]Pad_1524_um 5 7611.4 4318)
|
||||
(pin Round[A]Pad_1524_um 6 7611.4 1778)
|
||||
(pin Round[A]Pad_1524_um 7 7611.4 -762)
|
||||
(pin Round[A]Pad_1524_um 8 7611.4 -3302)
|
||||
(pin Round[A]Pad_1524_um 9 7611.4 -5842)
|
||||
(pin Round[A]Pad_1524_um 10 7611.4 -8382)
|
||||
(pin Round[A]Pad_1524_um 11 7611.4 -10922)
|
||||
(pin Round[A]Pad_1524_um 12 7611.4 -13462)
|
||||
(pin Round[A]Pad_1524_um 13 -7608.6 -13462)
|
||||
(pin Round[A]Pad_1524_um 14 -7608.6 -10922)
|
||||
(pin Round[A]Pad_1524_um 15 -7608.6 -8382)
|
||||
(pin Round[A]Pad_1524_um 16 -7608.6 -5842)
|
||||
(pin Round[A]Pad_1524_um 17 -7608.6 -3302)
|
||||
(pin Round[A]Pad_1524_um 18 -7608.6 -762)
|
||||
(pin Round[A]Pad_1524_um 19 -7608.6 1778)
|
||||
(pin Round[A]Pad_1524_um 20 -7608.6 4318)
|
||||
(pin Round[A]Pad_1524_um 21 -7608.6 6858)
|
||||
(pin Round[A]Pad_1524_um 22 -7608.6 9398)
|
||||
(pin Round[A]Pad_1524_um 23 -7608.6 11938)
|
||||
(pin Round[A]Pad_1524_um 24 -7608.6 14478)
|
||||
)
|
||||
(image Kailh:ferris_broom
|
||||
)
|
||||
(image foostan:ResetSW
|
||||
(outline (path signal 150 3000 -1500 3000 -1750))
|
||||
(outline (path signal 150 3000 -1750 -3000 -1750))
|
||||
(outline (path signal 150 -3000 -1750 -3000 -1500))
|
||||
(outline (path signal 150 -3000 1500 -3000 1750))
|
||||
(outline (path signal 150 -3000 1750 3000 1750))
|
||||
(outline (path signal 150 3000 1750 3000 1500))
|
||||
(outline (path signal 150 -3000 -1750 3000 -1750))
|
||||
(outline (path signal 150 3000 -1750 3000 -1500))
|
||||
(outline (path signal 150 -3000 -1750 -3000 -1500))
|
||||
(outline (path signal 150 -3000 1750 -3000 1500))
|
||||
(outline (path signal 150 -3000 1750 3000 1750))
|
||||
(outline (path signal 150 3000 1750 3000 1500))
|
||||
(pin Round[A]Pad_2000_um 1 3250 0)
|
||||
(pin Round[A]Pad_2000_um 2 -3250 0)
|
||||
)
|
||||
(image "kbd:MJ-4PP-9"
|
||||
(outline (path signal 150 -4750 -12000 -4750 0))
|
||||
(outline (path signal 150 1250 -12000 -4750 -12000))
|
||||
(outline (path signal 150 1250 0 1250 -12000))
|
||||
(outline (path signal 150 -4750 0 1250 0))
|
||||
(outline (path signal 150 -3000 0 3000 0))
|
||||
(outline (path signal 150 3000 0 3000 -12000))
|
||||
(outline (path signal 150 3000 -12000 -3000 -12000))
|
||||
(outline (path signal 150 -3000 -12000 -3000 0))
|
||||
(pin Oval[A]Pad_1700x2500_um D -3850 -10300)
|
||||
(pin Oval[A]Pad_1700x2500_um A 350 -11800)
|
||||
(pin Oval[A]Pad_1700x2500_um B -3850 -3300)
|
||||
(pin Oval[A]Pad_1700x2500_um C -3850 -6300)
|
||||
(pin Oval[A]Pad_1700x2500_um B@1 2100 -3300)
|
||||
(pin Oval[A]Pad_1700x2500_um C@1 2100 -6300)
|
||||
(pin Oval[A]Pad_1700x2500_um D@1 2100 -10300)
|
||||
(pin Oval[A]Pad_1700x2500_um A@1 -2100 -11800)
|
||||
(keepout "" (circle F.Cu 1200 -1750 -8500))
|
||||
(keepout "" (circle B.Cu 1200 -1750 -8500))
|
||||
(keepout "" (circle F.Cu 1200 -1750 -1500))
|
||||
(keepout "" (circle B.Cu 1200 -1750 -1500))
|
||||
(keepout "" (circle F.Cu 1200 0 -1500))
|
||||
(keepout "" (circle B.Cu 1200 0 -1500))
|
||||
(keepout "" (circle F.Cu 1200 0 -8500))
|
||||
(keepout "" (circle B.Cu 1200 0 -8500))
|
||||
)
|
||||
(padstack Round[A]Pad_1524_um
|
||||
(shape (circle F.Cu 1524))
|
||||
(shape (circle B.Cu 1524))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Round[A]Pad_1600_um
|
||||
(shape (circle F.Cu 1600))
|
||||
(shape (circle B.Cu 1600))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Round[A]Pad_2000_um
|
||||
(shape (circle F.Cu 2000))
|
||||
(shape (circle B.Cu 2000))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_4700x1000_um
|
||||
(shape (path F.Cu 1000 -1850 0 1850 0))
|
||||
(shape (path B.Cu 1000 -1850 0 1850 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_1000x5900_um
|
||||
(shape (path F.Cu 1000 0 -2450 0 2450))
|
||||
(shape (path B.Cu 1000 0 -2450 0 2450))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_1700x2500_um
|
||||
(shape (path F.Cu 1700 0 -400 0 400))
|
||||
(shape (path B.Cu 1700 0 -400 0 400))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_4700x300_um
|
||||
(shape (path F.Cu 300 -2200 0 2200 0))
|
||||
(shape (path B.Cu 300 -2200 0 2200 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_6100x300_um
|
||||
(shape (path F.Cu 300 -2900 0 2900 0))
|
||||
(shape (path B.Cu 300 -2900 0 2900 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_1200x300_um
|
||||
(shape (path F.Cu 300 -450 0 450 0))
|
||||
(shape (path B.Cu 300 -450 0 450 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_12100x300_um
|
||||
(shape (path F.Cu 300 -5900 0 5900 0))
|
||||
(shape (path B.Cu 300 -5900 0 5900 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Oval[A]Pad_11850x5900_um
|
||||
(shape (path F.Cu 5900 -2975 0 2975 0))
|
||||
(shape (path B.Cu 5900 -2975 0 2975 0))
|
||||
(attach off)
|
||||
)
|
||||
(padstack "Via[0-1]_600:400_um"
|
||||
(shape (circle F.Cu 600))
|
||||
(shape (circle B.Cu 600))
|
||||
(attach off)
|
||||
)
|
||||
)
|
||||
(network
|
||||
(net row0
|
||||
(pins SW16-1 SW16-1@1 U1-7)
|
||||
)
|
||||
(net row1
|
||||
(pins SW17-1 SW17-1@1 U1-8)
|
||||
)
|
||||
(net row2
|
||||
(pins SW18-1 SW18-1@1 U1-9)
|
||||
)
|
||||
(net row3
|
||||
(pins SW2-1 SW2-1@1 U1-10)
|
||||
)
|
||||
(net GND
|
||||
(pins SW10-2 SW10-2@1 SW2-2 SW2-2@1 SW3-2 SW3-2@1 SW5-2 SW5-2@1 SW6-2 SW6-2@1
|
||||
SW8-2 SW8-2@1 SW9-2 SW9-2@1 SW11-2 SW11-2@1 SW12-2 SW12-2@1 SW15-2 SW15-2@1
|
||||
SW16-2 SW16-2@1 SW17-2 SW17-2@1 SW18-2 SW18-2@1 SW14-2 SW14-2@1 SW4-2 SW4-2@1
|
||||
U1-3 U1-4 U1-23 RSW1-2 J1-C J1-C@1)
|
||||
)
|
||||
(net VCC
|
||||
(pins U1-21 J1-D J1-D@1)
|
||||
)
|
||||
(net col0
|
||||
(pins SW6-1 SW6-1@1 U1-20)
|
||||
)
|
||||
(net col1
|
||||
(pins SW5-1 SW5-1@1 U1-19)
|
||||
)
|
||||
(net col2
|
||||
(pins SW4-1 SW4-1@1 U1-18)
|
||||
)
|
||||
(net col3
|
||||
(pins SW3-1 SW3-1@1 U1-17)
|
||||
)
|
||||
(net col4
|
||||
(pins SW8-1 SW8-1@1 U1-16)
|
||||
)
|
||||
(net col5
|
||||
(pins SW9-1 SW9-1@1 U1-15)
|
||||
)
|
||||
(net LED
|
||||
(pins SW12-1 SW12-1@1 U1-1)
|
||||
)
|
||||
(net data
|
||||
(pins U1-2 J1-B J1-B@1)
|
||||
)
|
||||
(net reset
|
||||
(pins U1-22 RSW1-1)
|
||||
)
|
||||
(net SCL
|
||||
(pins SW15-1 SW15-1@1 U1-6)
|
||||
)
|
||||
(net SDA
|
||||
(pins SW14-1 SW14-1@1 U1-5)
|
||||
)
|
||||
(net "Net-(U1-Pad24)"
|
||||
(pins U1-24)
|
||||
)
|
||||
(net "Net-(J1-PadA)"
|
||||
(pins J1-A J1-A@1)
|
||||
)
|
||||
(net "Net-(U1-Pad14)"
|
||||
(pins SW10-1 SW10-1@1 U1-14)
|
||||
)
|
||||
(net "Net-(U1-Pad13)"
|
||||
(pins SW11-1 SW11-1@1 U1-13)
|
||||
)
|
||||
(net "Net-(U1-Pad12)"
|
||||
(pins U1-12)
|
||||
)
|
||||
(net "Net-(U1-Pad11)"
|
||||
(pins U1-11)
|
||||
)
|
||||
(class kicad_default "" GND LED "Net-(J1-PadA)" "Net-(U1-Pad11)" "Net-(U1-Pad12)"
|
||||
"Net-(U1-Pad13)" "Net-(U1-Pad14)" "Net-(U1-Pad24)" SCL SDA VCC col0
|
||||
col1 col2 col3 col4 col5 data reset row0 row1 row2 row3
|
||||
(circuit
|
||||
(use_via Via[0-1]_600:400_um)
|
||||
)
|
||||
(rule
|
||||
(width 250)
|
||||
(clearance 200.1)
|
||||
)
|
||||
)
|
||||
)
|
||||
(wiring
|
||||
)
|
||||
)
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -1,236 +1,236 @@
|
|||
update=Wed 22 Jul 2020 14:49:49 BST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[general]
|
||||
version=1
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=sweep.net
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.5
|
||||
ViaDiameter1=0.6
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.15
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.15
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.15
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.2
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.6
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
update=Wed 22 Jul 2020 14:49:49 BST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[general]
|
||||
version=1
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=sweep.net
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.5
|
||||
ViaDiameter1=0.6
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.15
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.15
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.15
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.2
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.6
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
|
|
|
|||
|
|
@ -1,78 +1,78 @@
|
|||
|
||||
(rules PCB ferris-sweep-compact
|
||||
(snap_angle
|
||||
fortyfive_degree
|
||||
)
|
||||
(autoroute_settings
|
||||
(fanout off)
|
||||
(autoroute on)
|
||||
(postroute on)
|
||||
(vias on)
|
||||
(via_costs 50)
|
||||
(plane_via_costs 5)
|
||||
(start_ripup_costs 100)
|
||||
(start_pass_no 927)
|
||||
(layer_rule F.Cu
|
||||
(active on)
|
||||
(preferred_direction horizontal)
|
||||
(preferred_direction_trace_costs 1.0)
|
||||
(against_preferred_direction_trace_costs 2.2)
|
||||
)
|
||||
(layer_rule B.Cu
|
||||
(active on)
|
||||
(preferred_direction vertical)
|
||||
(preferred_direction_trace_costs 1.0)
|
||||
(against_preferred_direction_trace_costs 1.8)
|
||||
)
|
||||
)
|
||||
(rule
|
||||
(width 250.0)
|
||||
(clear 200.2)
|
||||
(clear 125.0 (type smd_to_turn_gap))
|
||||
(clear 50.0 (type smd_smd))
|
||||
)
|
||||
(padstack "Via[0-1]_600:400_um"
|
||||
(shape
|
||||
(circle F.Cu 600.0 0.0 0.0)
|
||||
)
|
||||
(shape
|
||||
(circle B.Cu 600.0 0.0 0.0)
|
||||
)
|
||||
(attach off)
|
||||
)
|
||||
(via
|
||||
"Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
|
||||
)
|
||||
(via
|
||||
"Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
|
||||
)
|
||||
(via_rule
|
||||
default "Via[0-1]_600:400_um"
|
||||
)
|
||||
(via_rule
|
||||
"kicad_default" "Via[0-1]_600:400_um-kicad_default"
|
||||
)
|
||||
(class default
|
||||
(clearance_class default)
|
||||
(via_rule default)
|
||||
(rule
|
||||
(width 250.0)
|
||||
)
|
||||
(circuit
|
||||
(use_layer F.Cu B.Cu)
|
||||
)
|
||||
)
|
||||
(class "kicad_default"
|
||||
row0 row1 row2 row3 GND VCC col0 col1
|
||||
col2 col3 col4 col5 LED data reset SCL
|
||||
SDA "Net-(U1-Pad24)" "Net-(J1-PadA)" "Net-(U1-Pad14)" "Net-(U1-Pad13)" "Net-(U1-Pad12)" "Net-(U1-Pad11)"
|
||||
(clearance_class "kicad_default")
|
||||
(via_rule kicad_default)
|
||||
(rule
|
||||
(width 250.0)
|
||||
)
|
||||
(circuit
|
||||
(use_layer F.Cu B.Cu)
|
||||
)
|
||||
)
|
||||
|
||||
(rules PCB ferris-sweep-compact
|
||||
(snap_angle
|
||||
fortyfive_degree
|
||||
)
|
||||
(autoroute_settings
|
||||
(fanout off)
|
||||
(autoroute on)
|
||||
(postroute on)
|
||||
(vias on)
|
||||
(via_costs 50)
|
||||
(plane_via_costs 5)
|
||||
(start_ripup_costs 100)
|
||||
(start_pass_no 927)
|
||||
(layer_rule F.Cu
|
||||
(active on)
|
||||
(preferred_direction horizontal)
|
||||
(preferred_direction_trace_costs 1.0)
|
||||
(against_preferred_direction_trace_costs 2.2)
|
||||
)
|
||||
(layer_rule B.Cu
|
||||
(active on)
|
||||
(preferred_direction vertical)
|
||||
(preferred_direction_trace_costs 1.0)
|
||||
(against_preferred_direction_trace_costs 1.8)
|
||||
)
|
||||
)
|
||||
(rule
|
||||
(width 250.0)
|
||||
(clear 200.2)
|
||||
(clear 125.0 (type smd_to_turn_gap))
|
||||
(clear 50.0 (type smd_smd))
|
||||
)
|
||||
(padstack "Via[0-1]_600:400_um"
|
||||
(shape
|
||||
(circle F.Cu 600.0 0.0 0.0)
|
||||
)
|
||||
(shape
|
||||
(circle B.Cu 600.0 0.0 0.0)
|
||||
)
|
||||
(attach off)
|
||||
)
|
||||
(via
|
||||
"Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
|
||||
)
|
||||
(via
|
||||
"Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
|
||||
)
|
||||
(via_rule
|
||||
default "Via[0-1]_600:400_um"
|
||||
)
|
||||
(via_rule
|
||||
"kicad_default" "Via[0-1]_600:400_um-kicad_default"
|
||||
)
|
||||
(class default
|
||||
(clearance_class default)
|
||||
(via_rule default)
|
||||
(rule
|
||||
(width 250.0)
|
||||
)
|
||||
(circuit
|
||||
(use_layer F.Cu B.Cu)
|
||||
)
|
||||
)
|
||||
(class "kicad_default"
|
||||
row0 row1 row2 row3 GND VCC col0 col1
|
||||
col2 col3 col4 col5 LED data reset SCL
|
||||
SDA "Net-(U1-Pad24)" "Net-(J1-PadA)" "Net-(U1-Pad14)" "Net-(U1-Pad13)" "Net-(U1-Pad12)" "Net-(U1-Pad11)"
|
||||
(clearance_class "kicad_default")
|
||||
(via_rule kicad_default)
|
||||
(rule
|
||||
(width 250.0)
|
||||
)
|
||||
(circuit
|
||||
(use_layer F.Cu B.Cu)
|
||||
)
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -1,2 +1,2 @@
|
|||
(fp_lib_table
|
||||
)
|
||||
(fp_lib_table
|
||||
)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
(sym_lib_table
|
||||
(lib (name corne-light-rescue)(type Legacy)(uri ${KIPRJMOD}/corne-light-rescue.lib)(options "")(descr ""))
|
||||
(lib (name sweep-rescue)(type Legacy)(uri ${KIPRJMOD}/sweep-rescue.lib)(options "")(descr ""))
|
||||
)
|
||||
(sym_lib_table
|
||||
(lib (name corne-light-rescue)(type Legacy)(uri ${KIPRJMOD}/corne-light-rescue.lib)(options "")(descr ""))
|
||||
(lib (name sweep-rescue)(type Legacy)(uri ${KIPRJMOD}/sweep-rescue.lib)(options "")(descr ""))
|
||||
)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue